Current Graduate Students for Peter M. Kogge
- Timothy Dysart. Ph.D: Fault Tolerant QCA Structures
- Sarah Frost, Ph.D.: Computing
Models for Nano Technologies
- Patrick Lafratta:
Ph.D.: Optimizing the Internal Microarchitecture and ISA of a Traveling
Thread PIM System
- Michael Putney, PhD.:
Reconfigurable Nano-logic
- Srinivas Sridharan, Ph.D.:
Transactional Memories.
- Megan Vance, Ph.D.: The
Multi-threading of Large Graph Problems on m-NUMA
MPPs.
Students completing graduate research directed by Peter Kogge (By Defense
Date)
- Megan Vance, PhD Proposal,
CSE Dept., Univ. of Notre
Dame, “Evaluation of A Massive m-NUMA Multicomputer With
Applications,” Jan 28, 2008.
- Srinivas Sridharan, PhD
Proposal, CSE Dept., Univ. of Notre
Dame, “New Architectures to Pole-Vault Memory and Concurrency
Walls,” May 2, 2007.
- Patrick Lafratta,
PhD Proposal, CSE Dept., Univ. of Notre
Dame, “Optimizing the internal microarchitecture and ISA of a
Traveling Thread PIM System.” April 19, 2007.
- Srinivas Sridharan, M.S. CSE
Dept., Univ. of Notre Dame, Implementing Scalable Locks and Barriers for
large scale Light-weight Multithreaded Systems, July 6, 2006.
- Megan Vance, (co-advised with
Lambert Schaelicke) M.S. CSE Dept., Univ. of Notre Dame, “Thread
Management For Increased Throughput Of Lightweight Threads,” June 9, 2006
- Richard Murphy, Ph.D. CSE
Dept., Univ. of Notre
Dame: “Traveling Threads: A New Multi-threaded Execution
Model,” May 31, 2006.
Now at Sandia National Labs
- Arun Rodrigues, Ph.D. CSE
Dept., Univ. of Notre
Dame: “Programming Future Architectures, Dusty Decks, Memory Walls,
and the Speed of Light,” April
18, 2006. Now at Sandia National Labs
- Timothy Dysart, M.S. CSE
Dept., Univ. of Notre
Dame, July, 2005: “Defect Properties of Quantum Cellular
Automata.”
- Sarah Elizabeth Frost, Ph.D.
Proposal, CSE Dept., Univ. of Notre
Dame, May 10, 2005:
“Using Nanotechnology to Solve Really Hard Problems Better.”
- Alexei Koudriavtsev, Ph.D.
CSE Dept., Univ. of Notre
Dame, May 9, 2005:
“Estimation of Performance and Power of SIMD Processors.” Now
at Amazon
- Sarah Elizabeth Frost, M.S.
CSE Dept., Univ. of Notre Dame, March 16, 2005: “Memory Architecture
for Quantum-dot Cellular Automata.”
- Michael Niemier, Ph.D. CSE
Dept., Univ. of Notre
Dame, Sept. 8, 2003:
“The Effects of a New Technology on the Design, Organization, and
Architectures on Computing Systems,” now Assistant Prof. Georgia
Tech, College of Computing.
- Rodrigues, Arun, M.S. CSE
Dept., Univ. of Notre
Dame, April 28, 2003: "RuDRA: A Reactive Dissipation Reducing
Architecture."
- Richard C. Murphy, Ph.D.
proposal: "Traveling Threads: A New model of Execution," Dec. 10, 2002
- O'Neil, Timothy, Ph.D. CSE
Dept., Univ. of Notre
Dame, February 25 2002:
"Techniques for Optimizing Loop
Scheduling." Co-directed with Prof. Edwin Sha,
now at Univ. of Texas
at Dallas. Now at Univ.
of Akron
- Lilia Yerosheva, M.S. CSE
Dept., Univ. of Notre
Dame, April 2001: "High-Level Prototyping of the HTMT Execution
Models for the HTMT Petaflop Machine in
Java."
- Richard C. Murphy, M.S. CSE
Dept., Univ. of Notre
Dame, April 2000: "Design Parameters for Distributed PIM Memory
Systems."
- Jason Zawodny,
M.S. CSE Dept., Univ. of Notre
Dame, Nov. 2000: "Cache-In-Memory: Searching
for Lower Power Embedded DRAM." Now at Goodrich Aerospace
- Michael Niemier, M.S. CSE
Dept., Univ. of Notre
Dame, March 2000: "Designing Digital Systems in Quantum Cellular
Automata". Now a Ph.D. student at ND
- Victor Zyuban,
Ph.D. CSE Dept., Univ. of Notre
Dame, March 2000: "Inherently Lower Power High Performance
Superscalar Architectures." Now at IBM Research, Yorktown,
NY.
- Steven Dartt,
M.S. CSE Dept., Univ. of Notre
Dame, Nov. 1998, "Exasphere: A Prototype
for a Parallel "Processor-In-Memory" Architecture"
- Lakshmi
Nanayanaswamy: M.S. CSE Dept., Univ.
of Notre Dame, Oct. 1997,
"Combinators In Memory: An Alternate
Parallel Execution Model"
- John David Bezek: Ph.D., SUNY Binghamton,
1993, "Decision Table Language and Its Parallel Execution
Architecture with Applications in Expert Systems"
Member of Dissertation Committee for following:
- Sheng
Li, Ph.D. Proposal, CSE Dept., Univ.
of Notre Dame, May 3, 2007: “Architectural
Support for Extended Memory Semantics in Parallel Programs”
- Kyle Wheeler, Ph.D. Proposal,
CSE Dept., Univ. of Notre
Dame, April 30, 2007:
“Memory Management in a Massively Parallel Shared-Memory
Environment,”
- Karsten
Steinhaeus, M.S. CSE Dept., Univ.
of Notre Dame, April 12, 2007: “Scalable
Learning with Thread-Level Parallelism.”
- Branden
James Moore, M.S. CSE Dept., Univ.
of Notre Dame, April 6, 2005: "Exploiting
Large Shared On-Chip Caches for Chip Multiprocessors."
- Thoziyoor, Shyamkumar
, M.S. CSE Dept., Univ.
of Notre Dame, April 7, 2004: "PIM Lite: VLSI Prototype of a Multithreaded
Processor-In-Memory Chip."
- Jeffrey Squyres,
Ph.D., CSE Dept., Univ. of Notre
Dame, April 2, 2004:
"A Component Architecture for LAM/MPI>"
- Hongchao
(Stephanie) Liu , M.S. CSE Dept., Univ.
of Notre Dame, Dec. 10, 2002: "Processor
Utilization Bounds for Real-Time Systems with Precedence
Constraints."
- Thomas Smith, M.S. CSE Dept.,
Univ. of Notre
Dame, Dec. 3, 2002:
"Meaningful I/O System Call Analysis."
- Robert Minnerick,
M.S. CSE Dept., Univ. of Notre Dame, Nov. 26, 2002: "Feedback
Adaptive Energy Control."
- Jucain
Butler, M.S. CSE Dept., Univ. of Notre Dame, July 8, 2002: "A
Web-based, Self-Paced Tutorial on Computer Architecture for an
Introduction to Engineering Course."
- Paul Schermerhorn,
M.S. CSE Dept., Univ. of Notre Dame, April 11, 2002, "A Platform for Prototyping
PIMOS System Services."
- Vsevolod
Panteleenko, Ph.D. CSE Dept., Univ.
of Notre Dame, Feb. 14, 2002:
"Instantaneous Offloading of Web Server Load."
- Kevin Xin
He, Ph.D. EE Dept., Univ. of Notre
Dame, April 2001: "Supervisory Control of Distributed Systems Using
Petri Nets and Network Unfolding."
- Yuhui
Zhu, M.S. CSE Dept., Univ. of Notre
Dame, Nov. 2000: "The Wave Digital PDE Sumulation Methods: Local Passivity Considerations for
Nonliner PDE Systems."
- Ovidiu
Daescu, Ph.D. CSE Dept., Univ.
of Notre Dame, April 2000:
"On Geometric Optimization Problems"
- Chantana
Chantrapornchai, Ph.D. CSE Dept., Univ. of Notre
Dame, April 1999: "System Level Synthesis Considering Impreciseness
based on Fuzzy Theory"
- Sissades
Tongsima, Ph.D. CSE Dept., Univ.
of Notre Dame, April 1999:
" Loop Scheduling for Applications with Fixed or Probabilistic
Timing"
- Dominic Bartek,
M.S. CSE Dept., Univ. of Notre
Dame, 1998: "Design and Evaluation of an At-the-Sense-Amplifier Datapath."
- Kartik
Nanda, M.S. CSE Dept., Univ.
of Notre Dame, 1998: Analysis
and Optimization of Processor-in-Memory Organizations."
- Richard Kendall. M.S. CSE
Dept., Univ. of Notre
Dame: "The Modify-on-Access File System."
- Kevin Klenck,
Ph.D. CSE Dept., Univ. of Notre
Dame
- David R. Surma,
Ph.D. CSE Dept., Univ. of Notre
Dame, April 1998, "Collision Graph Based Communication Scheduling and
Applications."
- Arun Lokanathan,
Ph.D. CSE Dept., Univ. of Notre
Dame, April 1998, "Concurrent Process Multi-Circuit
Optimization."
- Robert J. Szczerba,
CSE Dept., Univ. of Notre
Dame
- Michael J. Sheliga, Ph.D. CSE Dept., Univ. of Notre Dame, April
1997: "Efficient High Level Synthesis using Hardware/Multi-Software
Co-Design and Communication Minimization"
- Nelson Passos,
Ph.D. CSE Dept., Univ. of Notre
Dame, June 1996: "Improving Parallelism in Multi-Dimensional
Applications: The Multi-Dimensional Retiming Framework"
- Neelima
Mehdiratta, Ph.D. CS Dept. State Univ. of New
York at Binghamton, Aug. 1994: "A General Strategy for Scheduling
Parallel Programs on Distributed Memoryt
Multiprocessors."
- Andres Jaramillo, M.S. CS
Dept. State Univ. of New York
at Binghamton, Dec. 1989:
"RIPE: A RISCy Processing Element for
Loosely-Coupled Multiprocessors."