The primary objective of this NSF-sponsored workshop is to bring together some of the leading experts in complex silicon-level microsystems with key leaders from the molecular devices community to provide some initial discussions on how lessons learned from architecting silicon based systems can be ported to systems built from emerging nanoscale technologies.
The primary objective of this workshop is to bring together some of the leading experts in complex silicon-level microsystems with key leaders from the molecular devices community to provide some initial discussions on how to develop future answers to the following questions:
Another objective is to help both the system architecture and the new technology communities begin to develop the dialogs necessary to advance such technologies in a timely manner, and maximize the Governments investments in new programs such as NSFs Molecular Architecture Initiative.
The key output of the workshop will be a summary report which lists the conclusions developed by the workshop, the suggested research directions and roadmaps as appropriate, and perhaps most importantly identification of approaches to introduce expertise in the design of complex systems into molecular level technology developments.
While the bulk of the attendees from the silicon side will come from the computational microprocessor/microsystem area, a leavening of experts from other silicon but not digital areas, such as MEMS, mixed signal, systems-on-a-chip, CAD systems and design techniques, are also being invited. For the non-silicon side, experts in both new nano-level digital logic technologies will be invited, in addition to leaders in the more exotic technologies such as quantum and DNA based. For more details, click here
The workshop will be held on the campus of the University of Notre Dame in South Bend, Indiana - about 90 miles east of Chicago, and easily reached from major airline hubs in Chicago, St. Louis, Cincinnati, Pittsburgh, Cleveland, Detroit, and Atlanta. There is also convenient train and bus service, particularly from Chicago. The South Bend airport is about 15 minutes from campus by taxi.
We will start around 9am on Monday Nov. 12, and end early enough in the afternoon of the 13th to make airline connections back to both the East and West coasts.
Rooms are being reserved on campus at the Morris Inn for Sunday and Monday nights. Travel, accommodations, meals and conference fees will all be reimbursable through the workshop. On campus accommodations and airline travel booked through Anthony Travel (1-800-366-3772, Kaylene, firstname.lastname@example.org) can be billed directly to the workshop.
Jane Wroblewski (email@example.com, 219-631-8802) can assist in confirming reservations.
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As you may know, NSF has launched a major 5 year initiative on Nanoscale science and engineering (NSE) - . Its goals include fundamental understanding of nanoscale phenomena, synthesis and processing of nanodevices, and design of novel materials. Through support for research on computational methods and multiscale simulation techniques, the CISE directorate plays an important role in the physics of such phenomena.
However, there is another aspect of molecular manufacturing where CISE and its associated community have talents that are uniquely applicable to NSE. This is the area of architecture and design. To analyze and synthesize complex systems, the computer design tradition is to impose upon the basic technologies the concept of architecture, and to use multiple layers of abstraction, often with different mathematical models, languages and formalisms, to represent component interactions at different layers. Over the last 30 years, as new generations of silicon-based technology have appeared, new system bottlenecks have surfaced (memory latency, inter-instruction dependencies, clock distribution, power, off-chip bandwidth, etc.). In response, the computer architecture community has developed new architectural concepts and execution models (RISC, memory consistency models, vectors, VLIW, multi-threading, shared and distributed memory models), new subsystems and microarchitectural techniques (caches, pipelining, multi-way issue, branch prediction), new circuit design techniques (dynamic logic, clock distribution and gating, voltage scaling), new floorplanning and layout concepts (custom, standard cell, gate array, and field reprogrammable designs), and new design abstractions (high level design languages, synthesis, systems on a chip). This has happened largely because the architecture community has been working hand in hand with the device, circuits, and CAD communities.
In some sense this process has worked too well for silicon, with areas such as computer architecture now widely believed to have reached the level of a matured technology, where only incremental improvements are possible, and the big conceptual breakthroughs are largely in the past. In contrast, in the last few years a variety of new technologies have emerged which have the potential for designing artifacts of all sorts, including computers, at the molecular level. In terms of relevance, nanometer scale devices have the potential to extend Moores Law literally orders of magnitude beyond the edge of the conventional silicon roadmap of 35 nm in 2014. The problem, however, is that the community working in such technologies has been largely limited to the physical scientists. While this is sufficient to permit demonstrations of device-level feasibility, and perhaps simple circuits and subsystems, what is lacking is an appreciation for the techniques needed to scale the applicability of such technologies up to the regions where they can be regarded as serious contenders to silicon. Experience in understanding system-level constraints and how to modify low level circuit and device level parameters to overcome them is largely lacking. This is true not just for using such technologies for molecular level computing systems, but for any molecular level system of sufficient complexity where the lessons of hierarchical design and design abstractions will become important.
Given this, the timing is right for assembling a cross-disciplinary group to stimulate such discussions and prepare for near term new research opportunities. Besides the NSE initiative (with first deadlines expected in early December). NSF, for example, is also looking for creative work in its CSA (deadline: 12/5/01) and ITR (deadlines 11/12/01 and 2/6/02) programs.
Before the workshop, suggestions on key literature will be solicited, and copies distributed in advance to the attendees.
The meeting itself will be organized as a two day workshop, with the primary emphasis on developing interactions between the architecture and molecular technology communities. A few invited talks will be used to jump-start the discussion, including as examples: short introductions to different molecular level technologies, with the emphasis on basic device operation, primitive function blocks, and potential roadmaps for further developments; summaries of the current deficiencies in silicon technology, how that is attacked by architectural level techniques, and where future advances are expected; summaries of the state of the art in design abstractions, the implementation of such abstractions in CAD tools, and current limits to our ability to design complex systems with such tools; discussions of the roadblocks encountered in prior projects that attempted to infuse new technologies into large systems design.
The working part of the workshop will be organized around partitioning into groups having attendance from both the silicon and non-silicon side, with the goal of developing an appreciation for what the new technologies have to offer, an attempt to answer the questions posed in the workshop objectives, and to do so in a road map-like form that can serve as the basis for future combined research. A list of key references and websites will also be solicited as we go.
After the workshop, the workshop organizers will attempt to prepare a summary document expressing the overall conclusions of the workshop. While no formal proceedings will be generated from the workshop, a website will host both the invited talks, a summary of the bibliography and key on-line links, and the final summary report.