2003:
 
   G. Quan, X. S. Hu,   ``Minimal energy fixed-priority scheduling for variable voltage processors,'' accepted to IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems.
   P. Kalla, H. Henkel and X. S. Hu, ``LRU-SEQ: A novel replacement policy for leakage energy reduction in instruction caches,'' accepted by International Conference on Computer Aided Design, 2003.
   P. Kalla, H. Henkel and X. S. Hu, ``SEA: Fast Power Estimation for Micro-Architectures," Asia and South Pacific Design Automation Conference (ACM/IEEE), 2003, pp.~600-605.
   Z. Wang, E. Sha and X. S. Hu, ``Register aware scheduling for distributed cache clustered architecture," Asia and South Pacific Design Automation Conference (ACM/IEEE), 2003, pp.~71-76.
   Y. Zhang, D.Z. Chen, and X. S. Hu, ``Energy minimization of real-time tasks on variable voltage processors with transition energy overhead," Asia and South Pacific Design Automation Conference (ACM/IEEE), 2003, pp.~65-70.

 2002:
 
   H. Liu, X. S. Hu,   ``Processor utilization bounds for real-time systems with precedence constraints,'' Journal of Design Automation for Embedded Systems Special Issue on Design Methodologies and Tools for Real-Time Embedded Systems, Vol.~7, No.~1-2, 2002, pp.~89-113.
   Y. Zhang, X.S. Hu and D.Z. Chen,   ``Cell selection from technology libraries for minimizing power,'' Integration, the VLSI Journal, Vol.~31, No.~2, 2002, pp.~133-158.
   B. Mochocki, G. Quan and X. S. Hu,``A realistic variable voltage scheduling model for real-time applications,'' International Conference on Computer Aided Design 2002, pp.~726-731.
   Y. Zhang, X.S. Hu and D.Z. Chen, ``Task scheduling and voltage selection for energy minimization," Design Automation Conference, 2002, pp.~183-188.

 2001:
 
   X.S. Hu, T. Zhou and E.H.-M. Sha,   ``Estimating probabilistic timing performance for real-time embedded systems,'' IEEE Transactions on VLSI Systems,Vol.~9, No.~6, 2001, pp.~833--844.
   H. Liu and X. S. Hu, ``Efficient performance estimation for general real-time task systems,'' International Conference on Computer Aided Design2001, pp.~464-470.
   Z. Wang, X. S. Hu, and E. H.-M. Sha,``Combining partitioning and data padding for scheduling multiple loop nests," International Conference on Compilers, Architectures and Synthesis for Embedded Systems,2001, pp.~67--75.
   G. Quan and X. S. Hu, ``Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors,'' ACM/IEEE Design Automation Conference, June 2001, pp.~828--833.
   B. Hanounik and X. S. Hu, ``Linear-time matrix transpose algorithms using vector register file with diagonal registers,'' International Parallel and Distributed Processing Symposium,, April 2001, pp.~35 (6).
   Y. Zhang, x.S. Hu and D.Z. Chen, ``Cell Selection from Technology Libraries for Minimizing Power,'' Asia and South Pacific Design Automation Conference (ACM/IEEE), Feburary 2001, pp.~609--614.

 2000:
 
   R. Sambandam, X. S. Hu   ``Multi-valued performance metrics for real-time embedded systems,'' Journal of Design Automation for Embedded Systems, Vol.~5, No.~1, 2000, pp.~5--28.
   C. Chantrapornchai, E.H.-M. Sha and X. S. Hu   ``Efficient module selections for finding highly acceptable designs based on inclusion scheduling,'' Journal of System Architectures, Vol. 46, No. 11, 2000, pp. 1047-1071.
   C. Chantrapornchai, E.H.-M. Sha and X. S. Hu   ``Efficient acceptable design exploration based on module utility selection,'' IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol.~19, No.~1, 2000, pp.~19--29.
   G. Quan and X. S. Hu, ``Enhanced Fixed-Priority Scheduling with (m,k)-Firm Guarantee,'' IEEE Real-Time Systems Symposium, December 2000, pp.~79--88.
   G. Quan and X. S. Hu, ``Fast performance prediction for periodic task systems,'' International Workshop on Hardware-software Codesign (ACM/IEEE), May 2000, pp.~72--76.
   C. Chantrapornchai, E.H.-M. Sha, and X. S. Hu, ``A novel approach to module selection,'' 10th Great Lakes Symposium on VLSI (IEEE), March 2000, pp.~139--142.

 1999:
 
   G. Quan, X.S. Hu and G.W. Greenwood, ``Preference-driven hierarchical hardware/software partitioning,'' International Conference on Computer Design (IEEE), October 1999, pp.~652--657.
   Y. Zhang, X.S. Hu and D.Z. Chen, ``Global register allocation for minimizing energy consumption,'' International Symposium on Lower Power Electronics and Design (ACM/IEEE), August 1999, pp.~100--102.
   G.W. Greenwood, X.S. Hu, S. Ravichandran and G. Quan, ``A framework for user assisted design exploration,'' Design Automation Conference (ACM/IEEE), June 1999, pp.~414--419.
   T. Zhou, X.S. Hu and E.H-M. Sha, ``A probabilistic performance metric for real-time system design,'' 7th International Workshop on Hardware-software Codesign (ACM/IEEE), May 1999, pp.~90--94.
   Y. Zhang, X. S. Hu and D.Z. Chen, ``Low energy register allocation beyond basic blocks,'' International Symposium on Circuitsand Systems (IEEE), pp.~290--293, June 1999.
   T. Zhou, X.S. Hu and E.H.-M. Sha, ``Probabilistic performance estimation for real-time embedded systems,'' International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU-99) (ACM/IEEE), March 1999, pp.~83--88.
   C. Chantrapornchai, E.H.-M. Sha and X. S. Hu, ``Efficient algorithms for finding highly acceptable designs based on module-utility selections,'' 9th Great Lakes Symposium on VLSI (IEEE), March 1999, pp.~128--131.

 Before 1999:
 
   X.S. Hu, G.W. Greenwood,   ``An evolutionary approach to hardware/software partitioning,'' IEE Proceedings--Computers and Digital Techniques, Special Issue on Hardware/Software Codesign for Embedded Systems,Vol.~145, No.~3, May 1998, pp.~203--209.
   C. Chantrapornchai, E.H.-M. Sha and X. S. Hu, ``Efficient scheduling for imprecise timing based on fuzzy theory,'' 41st Midwest Symposium of Circuits and Systems (IEEE), August 1998, pp.~272--275.
   C. Chantrapornchai, S. Tongsima, E. H-M. Sha and X. S. Hu,``Dealing with impreciseness in architectural synthesis,'' International Conference on Artificial Intelligence and Soft Computing (IASTED), May 1998, pp.~473--476.
   G.W. Greenwood, X. S. Hu and J.G. D'Ambrosio,   ``Fitness functions for multiple objective optimization problems: Combining preferences with Pareto rankings,'' Foundations of Genetic Algorithms, R. Belew and M. Vose (Eds.), Morgan-Kaufmann, San Francisco, CA, 1997, pp.~437--455.
   X.S. Hu, J.G. D'Ambrosio,   ``Hardware/software partitioning for real-time embedded systems,'' Journal of Design Automation for Embedded Systems, Vol.~2, No.~3/4, May 1997, pp.~339--358.
   J.J. Brown, D.Z. Chen, G.W. Greenwood, X.S. Hu and R.W. Taylor,``Scheduling for power reduction in a real-time system,'' International Symposium on Lower Power Electronics and Design (IEEE), August 1997, pp.~84--87.
   R. Sambandam and X. S. Hu, ``Predicting timing behavior in architectural design exploration of real-time embedded systems,'' 34th Design Automation Conference,(ACM/IEEE), June 1997, pp.~157--160.
   X.S. Hu, G.W. Greenwood and J.G. D'Ambrosio, ``An evolutionary approach to configuration-level hardware/software partitioning,'' Fourth International Conference on Parallel Problem Solving from Nature, September 1996, pp.~900--909.
   X.S. Hu, S.C. Bass and R.G. Harber,   ``Minimizing the number of delay buffers in the synchronization of pipelined systems,'' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.~13, No.~12, December 1994, pp.~1441--1449.
   X.S. Hu, J.G. D'Ambrosio, B.T. Murray and D. Tang,,   ``Codesign of architectures for automotive powertrain modules,'' IEEE Micro, August 1994, pp.~17--25.
   X.S. Hu and J.G. D'Ambrosio, ``Configuration-level hardware/software partitioning for real-time embedded systems,'' Third International Workshop on Hardware-Software Co-Design (IEEE), September 1994, pp.~34--41.
   J.G. D'Ambrosio, X.S. Hu, B.T. Murray and D. Tang, ``The role of analysis in hardware/software co-design,'' Second International Workshop on Hardware-Software Co-Design (IEEE), October 1993.
   

    Designed by Zhong Wang