CSE/EE 462 VLSI Design Suggested Projects

The focus on the projects this year is to develop chips that we can fabricate and readily test here at ND.  The list below offers some suggestions.  You are also welcome to propose your own ideas.  Projects should ideally be done in groups of two, but you may also work alone.  Three is allowed if you can convince us that the project requires it.

A simple one page proposal with the project title, brief description, and group members is due on Monday Oct. 4.

Structured ASIC/Gate Array Fabric

Develop a fabric of mask programmable cells that can be customized using as few mask layers as possible to implement simple digital logic circuits.  Through personalization, the same fabric should be able to be customized as either a 4-bit ripple-carry adder or as a 4-bit counter.  There are many possible choices for the cells of the fabric, including sea-of-gates, PLAs, or one of the pass-transistor logic families.  See Rabaey section 8.5 for more info.  We'd really like to see at least one or two groups work on this.

SRAM Column

Design a column of an SRAM, which consists of a small number of cells on a bitline, with precharge and sensing circuitry, and optionally with a simple row decoder.  This is an important project--we'd like to have a memory technology that we can reliably fabricate at ND.  See Rabaey chapter 12.

Digital-to-Analog Converter/Analog-to-Digital Converter

Develop an R2R ladder based DAC.  This would be a suitable project for one person. Two people could work on developing a 4-bit successive-approximation A/D converter, similar to the design used in the sophomore EE class at the board level.  We've got more details and reading material available if you're interested.

Simple Photodiode Array

Two years ago, a group of ND students in the Spring Frontiers of Microelectronic Circuits course developed a concept for a simple photodiode array, as might be used in a digital camera, that could be fabricated at ND.  We have a very detailed report that they've written that can serve as the basis for the project.  The project would be appropriate for 2-3 students.  Again, we'd really like to see a group do this.

Dynamic Adder

Design the fastest possible 16-bit adder that you can, using dynamic logic.  See Rabaey 6.3 and 11.3.