Mach-TA Tutorial 

Updated September 25, 2004

Introduction

Mach-TA is Mentor Graphics fast timing analysis tool.  At Notre Dame, it currently runs only under the Solaris operating system.  This is a quick intro to Mach-TA--another tutorial will follow illustrating additional features.

Simulating a Combinational Circuit: NAND gate

• To set your environment for MachTA, at the Unix prompt, type

source /usr/local/src/idea_en2002/machta/.mentor_en2002

• Using a text editor, produce a file nand.sp describing a 2-input NAND gate, as shown below.  MTA uses the Spice file syntax.  The lines beginning with asterisks are comments.  The circuit netlist itself is a list of devices, where each device is described by both its type and connections. Before entering the netlist, label each device and node in the schematic. In this example, only two types of devices are used, voltage sources, whose name begins with a "v ", and mosfets, whose name begins with an "m".   The Spice/MTA syntax for a voltage source is:

  Vname   pos-node  neg-node  voltage

  The syntax for a mosfet is:

  Mname  drain-node  gate-node  source-node  substrate-node  type-model  L=length  W=width

  For an n-type mosfet, the substrate should be connected to gnd and for a p-type mosfet it should be connected to vdd

   

  * NAND gate MTA input file * device models .model n nmos .model p pmos Vvdd vdd 0 5 Vgnd gnd 0 0 m1 out a vdd vdd p L=0.5u W=5u m2 out b vdd vdd p L=0.5u W=5u m3 out a n1  gnd n L=0.5u W=5u m4 n1  b gnd gnd n L=0.5u W=5u .end

  
  

• To invoke Mach-TA (with the power analysis package included) on the NAND circuit, using the "typical" process corner of the AMI 0.5 micron process, type

mpa -t $ADK/technology/mta/ami05 -tc TYP nand.sp

Because we'll be using the AMI 0.5 micron process frequently, we've created a shell script in the course directory to invoke mpa with the settings for this process.  The script is in the directory /usr/local/courses/cse/cse462.01/cad/bin and is called mpa05.  Add this directory to your path in your .cshrc file, and then you can simply invoke mpa on the nand gate as

mpa05 nand.sp

The first time you run Mach-TA on the circuit, you may get an error "Cannot update file nand.spdo". Ignore it.

• Now we're ready to run the first piece of the simulation. First we'll set a and b low and simulate the circuit for 10 ns. To do so, we'll use the "L" command to set each of the inputs low (or "H" command to set inputs high), and then use the "run" command to run the simulation. Enter the following four commands in turn at the Mach-TA command prompt:

L a
L b
run 10

The node voltages in the Signal View should now change.  In particular, the value for "out" should now be 5 volts.

• Next set input "a" high with the "H" command (H a) and run the simulation for 10 ns more.  To do so either type "run 10" into the command window or click on the green triangle in the toolbar.  Do you get the expected result?
    
• A more efficient way to analyze a digital circuit with Mach-TA is with test vector files. A test vector file contains a list of sets of applied input stimuli, together with expected output response. When you run a test vector file, Mach-TA applies each input vector at a specified time and then compares the actual circuit outputs with the expected outputs after a specified delay . In addition to updating plotted waveforms, Mach-TA will also note any discrepancies between expected and actual output. The following is a test vector file for a NAND gate. The syntax for the actual test vectors is @time <inputs>outputs. The "to" expression following each of the output definitions states when the comparison between actual and expected output--"max" denotes that this should be done at the latest possible time, which is 1 femtosecond before the next test vector is applied. Edit a file called nand.tv containing the vector definitions below.  Note that the test vector file contains one comparison error, which you'll find in the next step.

• Before running the test vectors, you'll want to reset the simulation--do so by clicking on the "Reload Design" button, which is the first button in the toolbar (with 2 small arrows in a circle). To run a test vector file, select Tools > Run Test Vectors from the main menu or click on the "01010 folder" icon. You should get an error associated with the test vector with inputs 10. Correct the error in the test vector file and re-run the simulation.  What message do you get when all tests pass?

Using the Waveform Viewer (SimWave)

• We'll illustrate the use of SimWave using the nand gate example above.  Start a MachTA simulation on the nand gate as described above, or if MachTA is currently running, reset the simulation by clicking on the "Reload Design" icon, which has the two "circular arrows".
   
• Open the Wave Viewer (SimWave) from the main menu with Tools > Wave Viewer, or by clicking on the "waves" icon.
   
• Direct the simulator to plot the input and output signals a, b, and out by typing the following command into the Mach-TA command window: 
  
  plot v(a)  v(b)  v(out) 
  
  Labels for these signals should appear in the SimWave window.  If they don't (which--who knows why--happens sometimes on some machines):
  • Select "Edit > Add Signals" from the SimWave main menu.  
  • Select v(a), v(b), and v(c) from the pop-up browser (either click and drag, ctrl-click on individual signals, or shift-click to select a group).
  • Click on the "square wave" icon to select the signals.  Now the labels for them should appear in the SimWave main window.
    
• Run the first piece of the simulation. Set "a" and "b" low and simulate the circuit for 10 ns. 
  
  L a
  L b
  run 10
  
  Results should appear in SimWave, with all signals low.
  
• Next set both "a" and "b" high and run the simulation for 10 ns more. In order to make the results appear properly in SimWave, select "View > Zoom Fit" then "View > Zoom Values" from the SimWave main menu. Change the time base in SimWave from femtoseconds to nanoseconds by pressing the button labled "fs" in the top-right corner of the SimWave window and selecting "ns" from the pop-up menu.
  
• Now we'll use SimWave to examine the transition between a change in "a" and a change in "out". To zoom into the region of interest, first, click the left mouse button just to the left of the transition region--a red cursor line should appear where you clicked (called the "Cursor"). Then, click the right mouse button to the right of the transition region--a white line (called the "Baseline") should appear. Then select "View > Zoom C1-C2" (or click the magnifying-glass-between-two-red-lines icon).
  
• Measuring a propagation delay with Mach-TA is extremely convenient. First, hold the shift  key and click the left mouse button somewhere in the rising transition area for "a"--the red cursor will jump to the middle of the transition. Then hold the shift key and click the right mouse button somewhere in the corresponding rising transition area for "out"--the white baseline will jump to the middle of the transition. Now, simply look a the number next to the "delta" triangle in the top right corner of the SimWave window--that's the propagation delay.  It should be a little less than 0.17 ns.

Hierarchical Design and Subcircuits

• For larger designs, it's generally useful to divide the design into modules called subcircuits, and then construct a hierarchical design by wiring the subcircuits together.  In this section, will illustrate the use of subcircuits in MachTA to construct an AND gate from a NAND and an inverter.
    
• Although multiple subcircuits can be defined in a single file, we'll adopt a convention of putting each subcircuit in its own file, and then including these files into a parent file.  The syntax for defining a subcircuit in MachTA (as well as Spice) is:

.subckt name portlist
netlist
.ends

where name is the name of the subcircuit, portlist is a list of all the ports on the netlist (including VDD and GND), and netlist is the list of interconnected devices on nets, where the nets that are ports have the same names as defined in portlist.  For example, a subcircuit for a 2-input NAND gate, using the same schematic as the example above, would be:

*file: nand2.sp .subckt nand2 a b out vdd gnd m1 out a vdd vdd p L=0.5u W=5u m2 out b vdd vdd p L=0.5u W=5u m3 out a n1  gnd n L=0.5u W=5u m4 n1  b gnd gnd n L=0.5u W=5u .ends

Similarly, we can define a subcircuit for an inverter

• In order to create a larger circuit composed of subcircuits, you instantiate the subcircuits and then wire the instances together.  The syntax for instantiating a subcircuit is:

xinstance_name portmap subcircuit_name

All instances of subcircuits must begin with "x" (like all MOSFETS begin with "m" or capacitors begin with "c").  The portmap is the list of nets--in order--to which each of the ports in the portlist of the subcircuit are connected.  Finally subcircuit_name is the name of the subcircuit being instantiated.  The figure below illustrates the AND gate composed of instances of "nand2" and "inv".  Note that devices and nets defined within a subcircuit are local to the subcircuit; hence the net "n1" within "nand2" is not the same net as "n1" defined in and2.  Also note that it's possible to define subcircuits that instantiate other subcircuits within them, to form a hierarchy of subcircuits.

*file: and2.sp .model n nmos .model p pmos Vvdd vdd 0 5 Vgnd gnd 0 0 .include nand2.sp .include inv.sp xnand2_1 IN1 IN2 n1  vdd gnd nand2 xinv_1   n1  OUT vdd gnd inv .end

Simulating a Sequential Circuit: Counter

• In order to simulate a sequential circuit, you need a clock. While it's possible to define a clock as an input signal in a test vector file, this is awkward. A better way is to define the clock as a pulse train separate from the test vectors, and to specify only the combinational inputs and outputs in the vector file. For this example we'll consider a 2-bit counter with asynchronous reset.
  
• To begin, copy the file count2.sp (which was extracted from the counter in the automatic layout tutorial) to your working directory and invoke Mach TA on it as above.
  
• A test vector file, count2.tv, is shown below. Note that the only input to the circuit is the reset signal, r. Also note that the period for sequencing through the test vectors is 10 nS.

# count2.tv CODEFILE UNITS nS RISE_TIME .5 FALL_TIME .5 INPUTS r; OUTPUTS q1(to=max), q0(to=max); CODING(ROM) # start vectors @0 <1>00; @10 <0>01; @20 <0>10; @30 <0>11; @40 <0>00; END

• Define the clock by entering a "pulse" statement in the Mach TA command window as shown below. Since a new test vector is applied every 10 nS, we define the clock to have the same period. The clock rising edge should be asserted, however, in the middle of each cycle. To do so, we simply delay the clock pulse by 5 nS.

pulse v(clk) clk gnd pulse(0 5 5n .5n .5n 5n 10n) # ------------------------(Vlo Vhi delay trise tfall delay period)

• You can now run the test vector file and plot the results as before.

Power Measurement

Suppose that you want to measure the total power dissipation between 0 and 40 ns in simulating the counter. Use the following command before running the test vector file:

measure irms RMS I(Vvdd) from=0n to=40n