HSPICE Tutorial

Introduction

HSPICE is Avant!'s version of SPICE, the industry-standard circuit simulator. In this tutorial, you will follow the steps to simulate a CMOS inverter using the AMI 0.5 micron process design rules, and then try simulating a NAND gate on your own. Please refer to the online HSPICE and AvanWaves documentation for clarification as needed.

Setting Up Your Environment

source /usr/local/src/hspice/v2001.4/2001.4/bin/cshrc.meta

You should put this statement into your .cshrc file so that you don't need enter it for each hspice session.

Editing the Input File

Spice files contain a number of sections:

title line
comments
netlist declaration
subcircuit definitions
device model definitions
stimuli
simulation control commands
simulation output format commands

Using your favorite text editor, type in the following lines and save the file in your hspice_tut directory as inv.sp

Note: hspice seems to require that there are no leading blank spaces on each line of the input file. Beware of this if you cut-and-paste!


Inverter Tutorial (this is the title line)

* enable post-processing by AvanWaves
.options post

* device model file
.include ami05.md

* transient analysis: step size = 50 psec, duration = 2 nsec
.tran 50p 2n

* specify nodes to print (hspice will print them all, anyway)
.print tran v(in) v(out)

* here's the inverter netlist declaration
* mosfet: mxx drain gate source substrate model length width
m1 OUT IN VDD VDD CMOSP l=.5u w=10u
m2 OUT IN GND GND CMOSN l=.5u w=10u

* here's the load capacitor on the inverter output
* capacitor: cxx node1 node2 capacitance
cload OUT GND 100f

* constant voltage source: vxx node1 node2 voltage
VDD VDD GND 5

* pulsed voltage source:
*
vxx node1 node2 PULSE params
* params = vlow vhigh delay rise fall pulse_width period
VIN IN GND PULSE 0 5 .5n .1n .1n .5n 2n

.end


Running HSPICE

Viewing Results in AvanWaves

On Your Own . . .