CSE 462 VLSI Design

Course Description

This course teaches the fundamental principles of CMOS digital integrated circuit (IC) design. The course makes extensive use of modern CAD tools for IC layout and simulation.  An IC design project, to be fabricated at Notre Dame's microelectronics facility, is a major part of the course.

Week
Topic

Week
Topic
1
Introduction and Overview

9
Sequential Circuits
2
MOS IV Characteristics

10
Configurable Logic
3
CMOS Inverter--Static View

11
Memory
4
Fabrication Process and Design Rules

12
Datapath Components
5
Static Logic Families

13
Dynamic Logic
6
CMOS Inverter--Dynamic View

14
Low Power Design
7
Catch-up, Review and Midterm Examination

15
Technology Trends and Scaling
8
Speed and Power

   

Instructors

Professor:

Dr. Jay Brockman
323B Cushing Hall
219 631-8810
jbb@cse.nd.edu

Graduate Assistants:

Sheng Li (EE)
sli2@nd.edu

When and Where

MWF 8:30-9:20
DeBartolo 210

Text

Rabaey, Chandrakasan, and Nikolic. Digital Integrated Circuits, 2nd Edition.  Prentice Hall 2003.

Grading

Midterm Exam 25%
Final Exam 25%
Project 25%
Homework 20%
Participation 5%

Lectures, Readings, and Assignments

Date Lecture or Topic Reading (Rabaey) Assignment
Aug 25, Wed Course Introduction and Overview 1   
Aug 27, Fri Course Introduction and Overview (continued) 1   
Aug 30, Mon Course Introduction and Overview (continued) 1   
Sep 1, Wed VLSI Design Methodology 8 HW1: Introduction
Sep 3, Fri MOS Transistor 3.3   
Sep 6, Mon MOS Transistor 3.3 HW2: MOS Transistors
Sep 8, Wed MOS Inverter (Static View) 5.3   
Sep 10, Fri MOS Inverter (Static View) (continued) 1.3.2  
Sep 13, Mon CMOS Fabrication Process 2  
Sep 15, Wed Video, Silicon Run    
Sep 17, Fri Complementary CMOS Logic and Layout 6.1, 6.2.1, A, D  
Sep 20, Mon Project Discussion: Designing for the ND Fab Line   HW3: Static CMOS
Sep 21, Tue IC Station Tutorial, 7:00-8:30 PM, 177 Fitzpatrick   Attend either Tue/Thu tutorial
Sep 22, Wed Ratioed and Pass Transistor Logic 6.2.2, 6.2.3  
Sep 23, Thu IC Station Tutorial, 2:00-3:30 PM, 177 Fitzpatrick   Attend either Tue/Thu tutorial
Sep 24, Fri Ratioed and Pass Transistor Logic (continued) 6.2.2, 6.2.3  
Sep 27, Mon Capacitance, Resistance, and CMOS Performance 3.3 Full Custom Design of a Standard Cell
Sep 29, Wed ICStation, LVS and Circuit Extraction (class meets in 177 Fitzpatrick cluster)    
Oct 1, Fri Review for Midterm    
Oct 4, Mon Midterm Exam    
Oct 6, Wed Capacitance, Resistance, and CMOS Performance  3.3, 4.3
 
Oct 8, Fri Net Delay  4.4  
Oct 11, Mon
Net Delay
4.4

Oct 13, Wed
Design for Speed
5.4, 6.2.1

Oct 25, Mon
Design for Speed 5.4, 6.2.1

Oct 27, Wed
Energy and Power
5.5

Oct 29, Fri
Design for Low Power
5.5, 6.2.1

Nov 1, Mon
Static Sequential Circuits
7.1, 7.2

Nov 3, Wed
Scaling and ITRS Roadmap


Nov 5, Fri
Static Sequential Circuits 7.1, 7.2

Nov 8, Mon
ROM and PLA
12.2.1, 12.6.1

Nov 10, Wed
Static RAM
12.2.3

Nov 12, Fri
Project Discussion


Nov 15, Mon
Datapath Basics
11.1, 11.2

Nov 17, Wed
Adders


Nov 19, Fri
Adders, Multipliers


Nov 22, Mon
Multipliers and Shifters


CAD Tool Tutorials and Documentation

Project

Other Useful Links