Computing at the Nanoscale

 

Instructor

Michael Niemier

307 Cushing Hall

mniemier at nd dot edu

(574) 631-3858

 

Office Hours

Wednesdays from 2 pm – 5 pm; anytime if IÕm not busy; by appointment

 

Lecture

Mondays, Wednesdays, and Fridays from 11:45 a.m. – 12:35 p.m. in DeBartolo Hall – Room 225

 

Preliminary Grades

-   Click here.  By last 4 digits of student ID #.  (See comments in certain casesÉ)

 

Final Grade Calculation

-   Option 1:

o         55% (HW 1, HW 2, HW 3, HW 5)

o         20% HW 4

o         25% Final Project

-   Option 2:

o         55% (HW 1, HW 2, HW 3, HW 5, HW 6)

o         20% HW 4

o         25% Final Project

 

Bonus Question

-   Can be found here.

 

Course Outline

 

Lecture

Date

Topic

Assignments

Lecture Source Material and/or

Comments

1

29-Aug

Introduction

Out:  Final Exam

 

2

31-Aug

The Teramac

(notes) (slides)

 

Discuss:

A Defect-Tolerant Computer Architecture:  Opportunities for Nanotechnology,

Heath, et. al.

3

3-Sep

CMOS fundametnals (pn junction, P/N-MOS transistor)

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

4

5-Sep

CMOS fundamentals + scaling issues

(slides) (supplement)

HW #1:

Roadblocks to MOS

(questions) (slides) (audio) (ITRS) (solutions)

Some notes were given on the board only.

(See me if copy desired.)

5

7-Sep

CMOS device performance metrics (power, latency)

(supplement)

 

Some notes were given on the board only.

(See me if copy desired.)

6

10-Sep

CMOS scaling issues

(static power, interconnect)

(supplement)

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

7

12-Sep

CMOS scaling issues

(interconnect &

Òthe big pictureÓ)

(supplement)

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

8

14-Sep

CMOS scaling wrap up +

Probabilistic CMOS (by Palem)

 

Discuss:

ÒProbabilistic Arithmetic and Energy Efficient Embedded Signal ProcessingÓ

Palem, et. al.

9

17-Sep

Probabilistic CMOS

(by Palem)

 

A continuation of Lecture 08

A board discussion.

No electronic notes available.

(See me if copy desired.)

10

19-Sep

Probabilistic CMOS

(by Bahar)

(supplement)

 

Discuss:

ÒNanoscale Logic based on MRFsÓ by Bahar, et. al.

 

Other paper references:

Bahar, et. al. (DATE Õ06)

Bahar, et. al. (DAC Õ05)

Bahar, et. al. (ICCAD Õ03)

Yedidia (Belief Propagation

11

21-Sep

Probabilistic CMOS

(by Bahar)

(supplement)

 HW #1 Due

A continuation of Lecture 10

A board discussion.

No electronic notes available.

(See me if copy desired.)

12

24-Sep

Motivation for alternative FET structures

(SCEs, dopants, etc.)

(supplement)

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

13

26-Sep

FinFETs

(supplement)

Two versions available:

 

(a)

Download Word document

HERE

(includes hyperlinks)

 

(b)

Webpage version

Discuss:

ÒIn search of ÔForeverÕ...Ó,

IEEE T. on Semi. Manufacturing

 

ÒCMOS Tri-gate TransistorsÉÓ,

Intel Technology Magazine

 

ÒTri-gate transistor architectureÉÓ,

2006 Symposium on VLSI Technology

 

ÒCMOS design near scaling limitÓ,

IBM J. of Res. And Dev.

 

ÒTurning Si on its EdgeÓ,

IEEE Circuits and Devices

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

14

28-Sep

CNT FETs and

CNT-based interconnect

(supplement)

 

Discuss:

ÒNanotubes for ElectronicsÓ

Avouris, Scientific American

 

ÒTransistor structures É in CNTsÓ

Avouris, J. Vac. Sci. Tech. B.

 

ÒPerf. Analysis Of CNT IC for VLSI Apps.Ó

Banerjee, ICCAD Ô05

 

ÒAre CNTs Future of VLSI Interconnects?Ó

Banerjee, DAC Ô06

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

15

1-Oct

Introduction to Reconfigurable Computing

(Dr. Hu's Slides)

 

Guest lecture by Dr. Sharon Hu

16

3-Oct

Array-based Architectures (Dehon)

(supplement)

 

Main Paper:

ÒNanowire-Based Programmable ArchitecturesÓ

Dehon, JETC, Vol 1, No. 2, July 2005

 

A board discussion.

No electronic notes available.

(See me if copy desired.)

 

Langmuir-Blodgett Flow Assembly:

ÒNanolithography Using Hierarchically Assembled Nanowire MasksÓ

Lieber, et. al., Nano Letters, Vol.3, No. 7

 

ÒDirected Assembly of One-Dimensional Nanostructures into Functional NWsÓ

Lieber, et. al., Science, Vol. 291, 2001

 

Crosspoint References:

Ò2D Molecular Electronic CircuitsÓ

Heath, et. al., ChemPhysChem, 2002, Vol. 3

 

ÒComputing with MoleculesÓ

Reed & Tour, Scientific American, 2000

17

5-Oct

Array-based Architectures (Dehon)

(supplement)

 

See papers for Lecture 16

 

Notes handed out in class.

18

8-Oct

Array-based Architectures (Dehon)

(