Srinivas Sridharan
Phd Candidate
Department of Computer Science and Engineering
384 FitzPatrick Hall of Engineering
Notre Dame, IN 46556
Email:
 
Advisor: Dr. Peter Kogge
 
Resume: (pdf)
 
Research Interests:
Transactional Memory, Processing-In-Memory,
Parallel Programming Models (MPI, PGAS),
Parallel File Systems (Lustre, PVFS)
 
Publications:
Srinivas Sridharan, Collin McCurdy, Jeffrey Vetter, and Peter Kogge, “Exploring the Potential for Overlapping Communication and Computation in Scientific MPI Applications Using Transactional Memory”, poster in SIAM Parallel Processing Conference, 2008.
 
Srinivas Sridharan, Arun Rodrigues, Peter Kogge, “Evaluating Synchronization Techniques for Light-weight Multithreaded/Multicore Architectures”, in the Proceedings of Symposium on Parallelism in Algorithms and Architectures (SPAA) 2007. (pdf)
 
Srinivas Sridharan, Brett Keck, Richard Murphy, Surendar Chandra, and Peter Kogge, “Thread Migration to Improve Synchronization Performance” in the Proceedings of the Workshop on Operating Systems Interference in High Performance Applications (OSIHPA), in conjunction with PACT 2006. (pdf)
 
Arun Rodrigues, Srinivas Sridharan, Shyamkumar Thoziyoor, Jay Brockman, Keith Underwood and Peter Kogge, “Enhancing Price/Performance for OpenMP using Processing-in-Memory” in the Proceedings of the Workshop on Programming Models for Ubiquitous Parallelism (PMUP), in conjunction with PACT 2006.
 
N. Venkateswaran, A. Krishnan, S. Niranjan, A. Shriraman and S. Sridharan, “The MIP Project: Evolution of a Novel Supercomputer Architecture”, in the Proceedings of the Workshop on Memory performance: Dealing with Applications , systems and architecture (MEDEA), in conjunction with PACT 2003.
 
 
Theses:
Srinivas Sridharan, “Implementing Scalable Locks and Barriers on Large-Scale Light-Weight Multithreaded Systems”, Phd Proposal, University of Notre Dame, July 2006.
 
Srinivas Sridharan, “Implementing Scalable Locks and Barriers on Large-Scale Light-Weight Multithreaded Systems”, M.S CSE Thesis, University of Notre Dame, July 2006. (pdf)
 
Srinivas Sridharan, “Memory-In-Processor: A Supercomputer Architecture to Pole-vault the Memory Wall”, WARFT Thesis, Waran Research Foundation (WARFT), India, May 2003.
 
Last Updated: Sept 2008